[hatari-devel] Strange CPU cycles
Laurent Sallafranque
laurent.sallafranque at free.fr
Tue Feb 23 14:16:33 CET 2010
> (I think this is already working like this)
Yes it is. But during these 144 cycles, DSP could be waiting a data from
CPU that it would have received at cycle 50 (for exxample) on the real
Falcon.
> Latest winuae has a cycle exact mode for the 68000 / A500 mode, where
every cycle goes to bus or copper or blitter ...
Is it much slower than the older version with cpu as master clock ?
They've also included the 68030 MMU whick lacks in hatari.
Regards
Laurent
npomarede at corp.free.fr a écrit :
> On Tue, 23 Feb 2010, Laurent Sallafranque wrote:
>
>> Hello,
>>
>> I've added the following spy in the code :
>>
>> /**
>> * Run DSP for certain cycles
>> */
>> void DSP_Run(int nHostCycles)
>> {
>> #if ENABLE_DSP_EMU
>> /* Cycles emulation is just a rough approximation by now.
>> * (to be tuned ...) */
>> int i = nHostCycles * 2 + 2;
>> int dsp_cycle = 0;
>>
>> if (i > 50)
>> fprintf(stderr, "%d i\n", i);
>>
>> ...
>>
>> I've started a demo. From Falcon boot to demo running ,I've got many
>> 68030 instructions that are > 50 cycles :
>> ...
>> 86 i
>> 86 i
>> 258 i
>> 82 i
>> 54 i
>> 274 i
>> 82 i
>> 54 i
>> 262 i
>> 82 i
>> 54 i
>> 270 i
>> 82 i
>> 54 i
>> 270 i
>
> It's possible to have instruction > 50 cycles, those are certainly
> some exceptions (when interrupts occur for example). The timings used
> are those for a 68000, 68030 version might be a little faster, but I
> don't think this is a cause, exceptions don't happen that often in the
> end (when compared to a 32 Mhz cpu total number of cycles)
>
> You can try to print "OpcodeName[OpcodeFamily]" as %s (see m68000.h
> for example) to see what kind of instruction is above 50 for example.
>
>>
>> This is just a small copy of what I get in real.
>>
>> How is it possible that a 68030 takes 258 cycles ?
>> As DSP code and crossbar code are relative to CPU cycles, it looks
>> strange for me.
>
> Current code doesn't allow to run cpu/dsp in synchronous mode where
> the bus would be the "master" clock, not the cpu (such a mode could be
> possible, but it would be *extremely* slower because each cpu
> instruction would have to be splitted into 2 cycles and every 2 cycles
> we could need to check if next bus acces should go to cpu or blitter
> or dma sound or ...).
>
> Latest winuae has a cycle exact mode for the 68000 / A500 mode, where
> every cycle goes to bus or copper or blitter ...
>
> In our case, as cpu is the master clock this means that if the cpu
> needs 144 cycles for an instruction, then you should execute the
> equivalent number of 144 cpu cycles for the dsp (so for example you
> process 60 consecutive dsp instructions) and then you return to the
> cpu emulation (I think this is already working like this)
>
>
> Nicolas
>
>
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