[hatari-devel] Big problems with bus error on Falcon

Laurent Sallafranque laurent.sallafranque at free.fr
Thu Jan 14 23:28:52 CET 2010


It's too interesting, I take 5 minutes to answear ;)

> This is address 0xff800A.  According to docs it's unassigned.

That's why I'm asking myself that on the real computer, reading (or 
writing to) an unasigned area does not generate a bus error as it does 
on hatari. (it's just a guess, I have no clue).


> Another strange thing : the game conquest stops with a bus error at
> address $ff8901.


> Did it try to read or write a word from an odd address?


I don't know, I'll have to look at the code.


Which docs do you use ?
I use the compendium and the hardware.txt docs.


> Btw. I was looking at the current Falcon mappings:
>
> For example:
>         { 0xff8006, SIZE_WORD, IoMem_ReadWithoutInterception, 
> IoMem_WriteWithoutInterception }, /* Falcon configuration */
>
>
> *Byte* at 0xff8006 is monitor type (programs cannot change), but
> the next byte is Falcon processor control byte:
> 	bit 0: 030 speed (set 16Mhz, unset 8Mhz)
> 	bit 2: blitter speed (set 16Mhz, unset 8Mhz)
> 	bit 5: STE bus emulation (0=on, 1=off)
>
> Shouldn't we emulate at least the first two bits?
>   

Yes, probably. If it's not too hard to emulate ;)

> Then:
>         { 0xff800A, SIZE_WORD, IoMem_VoidRead, 
> IoMem_VoidWrite },                               /* No bus error here */
>         { 0xff800C, SIZE_WORD, IoMem_VoidRead, 
> IoMem_VoidWrite },                               /* No bus error here */
>         { 0xff8060, SIZE_LONG, IoMem_VoidRead, 
> IoMem_VoidWrite },                               /* No bus error here */
>
> According to my documentation whole 0xff8008 - 0xff81ff range is unassigned.
> Why these particular addresses are singled out, why all the (503) addresses
> in this range aren't the same?
>   
Perhaps because Thomas added them one by one when he discovered and 
corrected bus error for specifics programs (the same way I did it for 
illusion). Thomas ?



> Then to video handling...
> ...
> So I guess display size can be wrong?
>   

Yes, I think so too, but Videl Emulation is quite incomplete for now.
I think I'll give it a try one of these days (but I don't feel as 
comfortable with video than I was with crossbar).
> According to my documentation, 0xff860e - 0xff86ff is unassigned,
> is this a bug:
>         { 0xff860e, SIZE_BYTE, IoMem_VoidRead, 
> IoMem_VoidWrite },                               /* No bus error here */
>         { 0xff860f, SIZE_BYTE, FDC_FloppyMode_ReadByte, 
> FDC_FloppyMode_WriteByte },             /* Floppy mode (?) register */
>   
Again, some patchs added one by one to let the falcon run ?
Perhaps the good way would be to put all unasigned areas as 
readvoid/writevoid ?

> 0xff8700 - 0xff878e are SCSI registers with the areas 0xff8716 - 0xff877f - 
> and 0xff8790 - 0xff879f being unassigned.  ioMemTabFalcon didn't have
> anything on them.  Would be good to have comment on them.
>   
I don't know here.


> Microwire registers not implemented:
>         { 0xff8922, SIZE_WORD, IoMem_VoidRead, 
> IoMem_VoidWrite },                                     /* Microwire data */
>         { 0xff8924, SIZE_WORD, IoMem_VoidRead, 
> IoMem_VoidWrite },                                     /* Microwire mask */
>   
Microwire doesn't exist on Falcon. I've left the 2 registers here just 
in case.
Perhaps they should be removed. (except if as I suppose, all N/A areas 
should be void read / write).

> These were not in my document, what the crossbar thing does here?
>         { 0xff893b, SIZE_BYTE, IoMem_ReadWithoutInterception, 
> IoMem_WriteWithoutInterception }, /* No bus error here */
>         { 0xff893c, SIZE_WORD, Crossbar_CodecStatus_ReadWord, 
> Crossbar_CodecStatus_WriteWord }, /* CODEC status */
>         { 0xff893e, SIZE_WORD, IoMem_ReadWithoutInterception, 
> IoMem_WriteWithoutInterception }, /* No bus error here */
> ?
>   
0xff893b : N/A ? I don't know here (it's just here in case of a program 
access to address 3a with a word.

0xff893c : (word) : Codec Status . It's a read only register that gives 
the state of the codecs (overflow, ...) I haven't implemented it 
completly in the crossbar for now.

0xff893e : N/A ?


> GPIO data stuff not implemented:
>         { 0xff8940, SIZE_WORD, IoMem_ReadWithoutInterception, 
> IoMem_WriteWithoutInterception }, /* GPx direction */
>         { 0xff8942, SIZE_WORD, IoMem_ReadWithoutInterception, 
> IoMem_WriteWithoutInterception }, /* GPx port */
>
>   
I'll probably never code these 2 ones, as they're relative to external 
DSP connector.


> SCC DMA and port registers not implemented:
>         { 0xff8c80, 8, IoMem_VoidRead, 
> IoMem_WriteWithoutInterception },                        /* TODO: SCC */
>   

I Don't know what is SCC.

> It would be nice if the "No bus errors here"  things added would have
> comments why they are there...
>   
At least, the $FF800A could be commented with "Illusion/aura compatibility)



What would be great is to know what exactly happens on a real falcon.
Like this, we could code it correctly.


Regards

Laurent




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